The present invention relates generally to semiconductor device packages and more particularly to a power semiconductor device package having a conductive assembly featuring a connecting structure.
Improvements in power semiconductor device packages provide for packages having higher power density through improved thermal dissipation structures and mechanisms as well as lower electrical resistance and reduced parasitic capacitances and inductances resulting from packaging materials and techniques. Techniques used to improve the performance of power semiconductor device packages include exposing top and bottom surfaces of the power semiconductor die so as to provide increased thermal dissipation, eliminating wire bonding so as to reduce parasitic effects, and reducing the package form factor and profile to achieve chip scale packaging. The simplification of fabrication steps provides for lower cost packaging solutions.
A prior art approach to improving the overall performance of power semiconductor device packages includes the provision of a mounting assembly such as disclosed in U.S. Pat. No. 3,972,062 entitled “Mounting assemblies for a plurality of transistor integrated circuit chips”. Mounting assemblies 30 each include a transistor chip 10 mounted at a first electrode 18 thereof in a cavity 22 of the mounting assembly, as shown in FIG. 1. The assembly includes mounting or support pads or feet 32, 34. As mentioned heretofore, the terminals 16, 14, of the transistor chip 10 extend outwardly into a plane in which the feet 32, 34 of the mounting channel section lie. The feet 32, 34 of the mounting assembly provide support therefor as well as a connection to the transistor collector electrode of the chip. In addition, the overlying channel section protects the transistor chip, and more importantly, serves as a heat sink therefor in use.
Other similar designs are disclosed in U.S. Pat. Nos. 6,624,522, 7,122,887, 6,767,820, 6,890,845, 7,253,090, 7,285,866, 6,930,397, and 6,893,901, U.S. Published Patent Applications 2007/0091546, 2007/0194441, 2007/0202631, 2008/0066303, and 2007/0284722, and U.S. Design Pat. No. D503,691.